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july 2009 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 SG6105A ? power supply s upervisor+re gulator+pwm SG6105A power supply supervisor + regulator + pwm features ? pc half-bridge (or 494) power supply supervisor + two 431 + pwm ? high integration with few external components ? over-voltage protection for 3.3v, 5v, and 12v ? under-voltage protection for 3.3v, 5v, and 12v ? under-voltage protection for -12v and/or -5v ? over-power and short-circuit protection ? power-down warning circuitry ? power-good circuitry ? delay time for pson and pg signal ? remote on/off function ? on-chip oscillator and error amplifier ? two shunt regulators for 3.3v and 5v-standby ? latching pwm for cycle-by-cycle switching ? push-pull pwm operation and totem pole outputs ? soft-start and maximum 93% duty cycle applications switching mode power supply for computers: ? at ? nlx ? sfx (micro-atx) description SG6105A controller is designed for switching-mode power supplies for desktop pcs. it provides all the functions necessary to monitor and control the output of the power supply. remote on/off control, power-good circuitry, and protection features against over-voltage and over-power are implemented. it directly senses all the output rails for ovp without the need for external dividers. an innovative ac-signal sampling circuitry provides a sufficient power-down warning signal for pg. a built-in timer generates accurate timing for the control circuit, including the ps-off delay. the cycle-by-cycle pwm switching prevents the power transformer from saturation and ensures the fastest response for the short-circuit protection, whic h greatly reduces stress for power transistors. two internal precision tl431 shunt regulators provide stable re ference voltage and a driver for 3.3v and 5v standby regulation. utilizing minimum external components, the SG6105A includes the functions for push-pull and/or half-bridge topology, decreasing production cost and pcb space, and increasing the mtbf for power supply. ordering information part number operating temperature range eco status package packing method SG6105Adz -40 to +105c rohs 20-pin dual in-line package (dip) tube SG6105Ady -40 to +105c green 20-pin dual in-line package (dip) tube for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 2 SG6105A ? power supply s upervisor+re gulator+pwm application diagram SG6105A figure 1. typical application
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 3 SG6105A ? power supply s upervisor+re gulator+pwm block diagram uv detector ov protector uv protector 3 7 2 dsd 5 buffer buffer 3.2v 2.1v 2.4v 64 a 5v 6 4 delay 7ms delay 7ms delay 15ms on/off delay 50ms 16ms 1.4v 1 v cc q q set clr d delay 2ms 0.7v v cc delay 3ms delay 300ms 8 a 2.5v 18 17 16 o.s.c q q set clr d q q set clr s r 9 8 10 15 20 19 v ref 2 a v33 v5 v12 uvac ri pg gnd vcc op1 op2 comp in ss pson opp nvp 12 11 fb2 vref2 13 14 fb1 vref1 figure 2. function block diagram
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 4 SG6105A ? power supply s upervisor+re gulator+pwm marking information marking for SG6105Adz (pb-free) marking for SG6105Ady(green compound) figure 3. top mark pin configuration figure 4. pin configuration (top view) f - fairchild logo z- plant code x- 1 digit year code y- 1 digit week code tt: 2 digits die run code t: package type (d=dip) p: y:green package m: manufacture flow code 20 1 SG6105Atp xxxxxxxxywwv t : d = dip p : z = lead free null=regular ppackage xxxxxxxx : wafer lot y : year; ww : week v : assembly location
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 5 SG6105A ? power supply s upervisor+re gulator+pwm pin definitions pin # name description 1 pson remote on/off logic input for cpu or controller. turn on/off the pwm output after the 7.5ms / 26ms delay. pson=0, the main smps is operational. pson =1, the main smps is off and the latch is reset. 2 v33 3.3v over-voltage/under-voltage control sense input. 3 v5 5v over-voltage/under-voltage control sense input. 4 opp over-power sense input. this pin is connected to driver transformer or the output of current transformer. when not in use, this pin should be grounded. 5 uvac ac fail detection. detect main ac voltage under-voltage and/or failure. 6 nvp the protection input for negative output, such as ?12v and/or ?5v. trip voltage=2.1v. 7 v12 12v over-voltage/under-voltage control sense input. 9/8 op1/op2 the totem-pole output drivers of push-pull pwm. the outputs are enabled (low) only when the nand gate inputs are high. the maximum duty cycle on an output (op1 or op2) is 46%. 10 pg power-good logic output, 0 or 1 (open-collector). pg=1, the power is good for operation. the pg delay is 300ms. 11 fb2 output for second converter regulation loop. 12 vref2 reference comparison input for second converter regulation loop, 2.5v. 13 vref1 reference comparison input for first converter regulation loop, 2.5v. 14 fb1 output for first converter regulation loop. 15 gnd ground. 16 comp error amplifier output and the input of the pwm comparator. 17 in the negative input of error amplifier. the positive input of error amplifier is a 2.5v reference voltage. 18 ss soft-start, settable through an external capacitor. t he current source output at this pin is 8a and the voltage is clamped at 2.5v. 19 ri connected to external resistor for the reference setting. r i =75k . 20 vcc supply voltage. 4.5v ~ 5. 5v connected to 5v-standby.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 6 SG6105A ? power supply s upervisor+re gulator+pwm absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc dc supply voltage at pin 20 16 v i out output current at pg, fb1, fb2 pins 30 ma v12, op1, op2, fb1, fb2, ss -0.3 16.0 v vpin pson, v33, v5, vref1, vref2, opp, uvac, ri, nvp, in, comp, pg -0.3 7.0 v (t a =25c) 1.5 p d power dissipation (t a =90c) 0.5 w t stg storage temperature range -55 +150 c ja thermal resistance, junction-to-air 82.5 c/w t j operating junction temperature +150 c t a operating ambient temperature -30 +125 c t l lead temperature (soldering, 10 seconds) +260 c esd human body model, jesd22-a114 3 kv notes: 1. all voltage values, except differential vo ltages, are given with respect to gnd pin. 2. stresses beyond those listed under "absolute maximu m ratings" may cause permanent damage to the device. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a operating ambient temperature range -40 +105 c
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 7 SG6105A ? power supply s upervisor+re gulator+pwm electrical characteristics v cc =5v, t a = 25c, r i =75k , unless noted operating specs. symbol parameter conditions min. typ. max. units i cc total supply current pg high 5 10 ma 3.3v 3.9 4.1 4.3 5.0v 5.8 6.1 6.5 v ovp over-voltage protection 12.0v 13.9 14.5 14.9 v 3.3v 2.0 2.6 2.8 5.0v 3.0 3.6 3.9 v uvp under-voltage protection 12.0v 6.0 7.2 8.0 v 3.3v 2.5 2.8 3.0 5.0v 4.0 4.3 4.5 v uvs under-voltage sense for pg low 12.0v 9.4 10.1 10.4 v v opp over-power protection (with t opp delay time) (3) v uvac =1.5v 2.25 2.32 2.39 v v opph over-power protection (without delay time) 3.0 3.2 3.4 v v x disable under-voltage / over-power protection threshold 0.2 0.3 0.4 v v nvp negative voltage protection: voltage level 2.0 2.1 2.2 v i nvp negative voltage protection: source current 63 67 71 a t ovp timing for over-voltage protection 0.37 0.70 1.35 ms t uvp timing for under-voltage protection 0.80 2.40 3.75 ms t uvs timing for under-voltage sense for pg low 0.37 1.20 1.88 ms t opp timing for over-power protection 5 7 9 ms t nvp timing for negative voltage protection 3.3 7.0 10.2 ms shunt regulator section current v ref reference voltage i fb =0.5ma, t a =25c 2.475 2.500 2.525 v v dev, i deviation of v ref over fb current (4) i fb =0.5ma to 10ma 20 mv v dev, t deviation of v ref over temperature (4) 10 30 mv r egli-fb line regulation (4) 4 Q v fb Q 15v 1 mv/v i out-fb ** output sinking current capability (4) v fb =2v 10 ma notes: 3. v opps =(2/3) x v opp + (1/3) x v uvac. 4. not tested in production. continued on following page?
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 8 SG6105A ? power supply s upervisor+re gulator+pwm electrical characteristics (continued) v cc =5v, t a = 25c, r i =75k , unless noted operating specs. symbol parameter conditions min. typ. max. units power-good section t pg timing for pg delay r i =75k ? 200 300 400 ms v uvac u vac voltage sense for pg 0.68 0.70 0.72 v t r power-good output rising time (5) c l =100pf, pull 2.2k to 5v 1 3 s t f power-good falling time (5) c l =100pf, pull 2.2k to 5v 300 500 ns v ol2 power-good output saturation level i pg =5ma 0.5 v i on2 power-good leakage current collector v pg =5v 1 a remote on/off section v ih high-level input voltage 2 v v il low-level input voltage 0.8 v v hysteresis pson input hysteresis voltage 0.3 v i pson remote input driving current 0.5 ma t pson(on) timing pson to on r i =75k ? 38 50 62 ms t pson(off) timing pson to off (ps-off) r i =75k ? 8 16 24 ms t psoff timing pg low to power off r i =75k ? 1.5 2.0 6.3 ms error amplifier section v 2.5 reference voltage t a =25c 2.46 2.50 2.54 v i ib input bias current (5) 0.1 a a vol open-loop voltage gain (5) 50 60 db bw unity gain bandwidth (5) 0.3 1.0 mhz psrr power supply rejection ratio (5) 50 db oscillator section f osc pwm frequency r i =75k ? 62 65 68 khz soft-start section i ss charge current 7 8 9 a comparator section dc duty cycle 85 93 % pwm output section v ol output voltage low i o =20ma 0.8 v v oh output voltage high v12=12v 4 v r o output impedance of v oh 1.5 3.3 k ? note: 5. not tested in production.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 9 SG6105A ? power supply s upervisor+re gulator+pwm typical performance characteristics 4.9 5.1 5.3 5.5 5.7 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) i c c - o p ( m a ) 2.400 2.450 2.500 2.550 2.600 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v ref (v) figure 5. operating supply current vs. temperature figure 6. reference voltage vs. temperature 3.000 4.000 5.000 6.000 -40 -25 -10 5 20 35 50 65 80 95 110 125 v oh (v) temperature (c) 63.000 64.000 65.000 66.000 67.000 -40 -25 -10 5 20 35 50 65 80 95 110 125 f osc (khz) temperature (c) figure 7. pwm output voltage vs. temperature figure 8. frequenc y vs. temperature 89.100 89.150 89.200 89.250 89.300 89.350 89.400 89.450 89.500 -40 -25 -10 5 20 35 50 65 80 95 110 125 dcmax (%) temperature (c) 2.450 2.500 2.550 2.600 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v 2 . 5 ( v ) figure 9. max duty cycle vs. temperature figure 10. reference voltage vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 10 SG6105A ? power supply s upervisor+re gulator+pwm typical performance characteristics (continued) 2.540 2.550 2.560 2.570 2.580 2.590 2.600 2.610 -40 -25 -10 5 20 35 50 65 80 95 110 125 v uvp (v) temperature (c) 4.100 4.120 4.140 4.160 4.180 -40 -25 -10 5 20 35 50 65 80 95 110 125 v ovp (v) temperature (c) figure 11. 3.3v v uvp vs. temperature figure 12. 3.3v v ovp vs. temperature 3.300 3.400 3.500 3.600 3.700 -40 -25 -10 5 20 35 50 65 80 95 110 125 v u v p ( v ) temperature (c) 6.100 6.120 6.140 6.160 6.180 -40 -25 -10 5 20 35 50 65 80 95 110 125 v o v p ( v ) temperature (c) figure 13. 5v v uvp vs. temperature figure 14. 5v v ovp vs. temperature 7.030 7.040 7.050 7.060 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v u v p ( v ) 14.450 14.500 14.550 14.600 -40 -25 -10 5 20 35 50 65 80 95 110 125 te m p erature ( c ) v o v p ( v ) figure 15. 12v v uvp vs. temperature figure 16. 12v v ovp vs. temperature
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 11 SG6105A ? power supply s upervisor+re gulator+pwm functional description protection against over-volt age, short-circuit, and fault conditions is mandatory in pc power supplies. these protection circuits can be realized by using many discrete components and compar ators, which occupy a lot of pcb space and add to assembling costs. this single chip controller ic provides complete protection circuits, shunt regulators, and pwm control function with fewer components. SG6105A is an ideal controller ic for pc switching mode power supplies. the features and benefits of this device are: 1. over-voltage and under-voltage protection for 3.3v, 5v, and 12v without external divider. 2. over-power protection. 3. uv protection for -12v and/or -5v. 4. power-down warning for power-good signal. 5. power-good signal and power-fail lockup. 6. remote on/off control. 7. delay time for pson and ps-off signal. 8. two shunt regulators for 3.3v and 5v-standby regulation. 9. complete pulse width modulation (pwm) control circuitry. 10. on-chip oscillator. 11. programmable soft-start. 12. maximum 93% duty cycle. 13. few external components. 14. more reliable system. 15. little space on pcb. 16. easy trouble-shooting and implementation. feature descriptions 1. over-voltage protection can be implemented without any additional components. over- voltage sense levels for 3.3v, 5v, 12v, are 4.1v, 6.1v, 14.5v, respectively. 2. over-current and/or short-circuit protection can also be achieved using over-power protection, in which the opp pin is connected to the current transformer (driver transformer). 3. the power-good signal is asserted to indicate the 3.3v, 5v, and 12v is above the under- voltage threshold level. pg pin goes high when the above condition is reached. a 2k pull-up resistor may connect to 5v. 4. the v cc can be supplied from the 5v-standby. 5. when the v cc voltage is higher than 7v, besides the shunt regulator, the circuit is shutdown and reset. no extra power supply is needed. 6. two internal high-precision 431 shunt regulators are built-in to provide stable reference voltages. 7. complete pwm control circuitry, including the error amplifier for push-pull or half-bridge operation. supervisory circuit operation the pc generates the remote on/off logic (pson), which is low for power supply on and high to switch off the power supply. the remote on/off is connected to pson input.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 12 SG6105A ? power supply s upervisor+re gulator+pwm application information introduction the application guide shows the key features of SG6105A and illustrates how to design in an atx switching mode power supply (smps). SG6105A is suitable for half-bridge, push-pull topology and incorporates with a four-channel supervisor, including 5v-standby. the pwm section of SG6105A comprises a built-in 65khz oscillator and high-immunity circuits, which protect the system from noise interference and provide more noise margins for improper pcb layout. SG6105A has ovp and uvp for 12v, 5v, and 3.3v. nvp is used for negative voltage protection, such as ? 12v and/or ?5v. the u vac (ac fails detection) is applied to detect ac line condition. two built-in internal precision tl431 shunt regulators can be used for 3.3v or 5v auxiliary standby power. ac fails detection through a resistor divider, u vac is connected to the secondary power transformer for detecting the ac line condition. once the voltage of u vac is lower than 0.7v for a period of time, such as 200s, the pg (power- good) signal is pulled low to indicate an ac line power- down condition. the voltage amplitude of the pwm switching signal in the secondary power transformer is proportional to the ac line voltage. adjust the ratio of resistor divider to decide the threshold of power-down warning. a small capacit or is connected from u vac to ground for filtering the switching noise. uvac r 1 r 2 c 1 0.7v v o v s figure 17. ac detection circuit over-power protection (opp) the opp is used for detecting over-power and/or short- circuit conditions. when opps voltage (p.4, note-1) is higher than 2.1v and this situation exists for longer than 7ms, SG6105A pulls the pg low and locks off the power outputs. op1 op2 opp v dd r 1 c 1 r 2 r 3 figure 18. opp protection circuit negative voltage protection (nvp) the nvp provides an under-voltage protection (uvp) for negative voltage outputs. an under-voltage represents the phenomenal of the overload condition in negative voltage output. for example, the ?12v output may drop to ?10v during the overload situation. a resistor determining the threshold of the protection is connected from pin nvp to the negative voltage output. via this resistor, nvp outputs a 64a constant current to the negative voltage output. when the nvp voltage is over 2.1v and the situation kept for longer than 7ms, SG6105A locks the power outputs off: v nvp =64a (r1 + r2) ? v-12v (1) the power outputs are locked off when vnvp 2.1v. figure 19. nvp protection circuit
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 13 SG6105A ? power supply s upervisor+re gulator+pwm timing diagram vcc pson 3.3v,5v,12v t pson(on) t uvp nvp t pson(off) t nvp ss(on/off) t psoff pg t pg vcc pson voltage < v uvac uvac opp t opp ss(on/off) pg figure 20. timing diagram
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 14 SG6105A ? power supply s upervisor+re gulator+pwm reference circuit SG6105A figure 21. reference circuit
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 15 SG6105A ? power supply s upervisor+re gulator+pwm bom reference component reference component d1,d2,d6 pr1004 r14 100k ? 1% d3 2a45v r15 47k ? 1/8w d4,d5 30c40 r16 9.47k ? 1/8w d7,d8,d9,d10,d11 1n4148 r17 1.5k ? 1% r1 62k ? 1/8w r18 1.45k ? 1% r2 3.2k ? 1/8w r19 39 ? 1/8w r3 510 ? 1% r20 1k ? 1/8w r4 1.5k ? 1% r21 96.7k ? 1/8w r5 100 ? 1/8w r22 10k ? 1/8w r6 100 ? 1/8w c1 101/50v r7 1k ? 1/8w c2,c5 2.2f/50v r8 47~100 ? c3,c6 103/50v r9 1k ? c4 333/50v r10 95.3k ? q1 a928 r11 93.7k ? q2,q3 2sc945 r12 75 k ? u1 pc817 r13 14.2k ? u2 SG6105A
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 16 SG6105A ? power supply s upervisor+re gulator+pwm physical dimensions 24.892-26.924 6.223-6.477 1.524 2.540 7.620 3.175-3.429 5.334 max 0.381 min 0.457 pin #1 c. does not include mold flash or protrusions. dambar protrusions shall not exceed d. does not include dambar protrusions. b. all dimensions are in millimeters a. conforms to jedec registration ms-001, mold flash or protrusions shall not exceed variations ad notes: 0.25mm. 0.25mm. e. drawing file name: n20srev1 0-15 2.921-3.810 9.017 typ figure 22. 20-lead dual inline package (dip) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com SG6105A ? rev. 1.0.2 17 SG6105A ? power supply s upervisor+re gulator+pwm

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